2 Ch. NECL to LVDS Translator

Applications:

• Converting Single Ended or Differential NECL Signals to LVDS Signals
• High Speed Digital Communications systems Testing
• High Speed SONET Clock Level Translation

Features:

• f_max > 500 MHz
• 1.1 ns Typical Output Rise & Fall Times
• Single Ended or Differential 50 Ω/V_TT Inputs
• Complementary 50 Ω LVDS Outputs
• SMA I/O Connectors
• Triax Output connector option
• Two channels for CLK/DATA translation
• Self-contained 1.3 x 2.9 x 3.9-in. units include ±8.5 V/1.8 A AC/DC Adapters

Description

The PRL-426N is a NECL-to-LVDS Logic Level Translator. The PRL-426N can receive either single-ended or differential NECL input signals, selected by a switch.

The differential outputs are 50 Ω back-terminated and are designed for driving floating 100 Ω loads, normally the configuration used in LVDS input circuits. The output swing is typically 600 mV with a common mode voltage of 1.2 V. Models with the TR suffix, e.g. PRL-426NTR, have Triax output connectors instead of the SMA connectors. These high speed translators facilitate testing of high speed digital communications circuits where conversion of NECL clock and data signals to LVDS level signals is often required.

The PRL-426N is designed to interface with -5.2 V or -3.3 V NECL circuits. In the differential input mode, both inputs D and D of the PRL-426N are terminated into 50 Ω/-2 V. In this mode, either one or both inputs can accept AC coupled signals as well. In the single input mode, signals should be connected to the D inputs only. The D inputs are switched internally to V_BB, nominally -1.3 V, and termination resistors R_T for the D input channels are changed to 62 Ω.

Each unit is supplied with a ±8.5 V/1.8 A AC/DC Adaptor and housed in a 1.3 x 2.9 x 3.9-in. extruded aluminum enclosure. Available accessories include voltage distribution modules for mounting multiple units.